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dc.contributor.authorMiller, Warner
dc.contributor.authorMoakis, James
dc.date.accessioned2016-06-30T19:04:53Z
dc.date.available2016-06-30T19:04:53Z
dc.date.issued1987-10
dc.identifier.issn0884-5123
dc.identifier.issn0074-9079
dc.identifier.urihttp://hdl.handle.net/10150/615265
dc.descriptionInternational Telemetering Conference Proceedings / October 26-29, 1987 / Town and Country Hotel, San Diego, Californiaen_US
dc.description.abstractPresented as an implementation of a Reed-Solomon encoder and decoder, which is 16-symbol error correcting, each symbol is 8 bits. This Reed-Solomon (RS) code is an efficient error correcting code that the National Aeronautics and Space Administration (NASA) will use in future space communications missions. A Very Large Scale Integration (VLSI) implementation of the encoder and decoder accepts data rates up to 80 Mbps. A total of seven chips are needed for the decoder (four of the seven decoding chips are customized using 3Fm Complementary Metal Oxide Semiconduction (CMOS) technology) and one chip is required for the encoder. The decoder operates with the symbol clock being the system clock for the chip set. Approximately 1.65 billion Galois Field (GF) operations per second are achieved with the decoder chip set and 640 MOPS are achieved with the encoder chip.
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.language.isoen_USen
dc.publisherInternational Foundation for Telemeteringen
dc.relation.urlhttp://www.telemetry.org/en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.titleHigh Data Rate Reed-Solomon Encoding and Decoding Using VLSI Technologyen_US
dc.typetexten
dc.typeProceedingsen
dc.contributor.departmentGoddard Space Flight Centeren
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
refterms.dateFOA2018-09-11T14:13:15Z
html.description.abstractPresented as an implementation of a Reed-Solomon encoder and decoder, which is 16-symbol error correcting, each symbol is 8 bits. This Reed-Solomon (RS) code is an efficient error correcting code that the National Aeronautics and Space Administration (NASA) will use in future space communications missions. A Very Large Scale Integration (VLSI) implementation of the encoder and decoder accepts data rates up to 80 Mbps. A total of seven chips are needed for the decoder (four of the seven decoding chips are customized using 3Fm Complementary Metal Oxide Semiconduction (CMOS) technology) and one chip is required for the encoder. The decoder operates with the symbol clock being the system clock for the chip set. Approximately 1.65 billion Galois Field (GF) operations per second are achieved with the decoder chip set and 640 MOPS are achieved with the encoder chip.


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