Field Programmable Gate Array Based Miniaturised Central Controller for a Decentralised Base-Band Telemetry System for Satellite Launch Vehicles

Persistent Link:
http://hdl.handle.net/10150/611604
Title:
Field Programmable Gate Array Based Miniaturised Central Controller for a Decentralised Base-Band Telemetry System for Satellite Launch Vehicles
Author:
Krishnakumar, M.; Sreelal, S.; Narayana, T. V.; Anguswamy, P.; Singh, U. S.
Affiliation:
Indian Space Research Organisation
Issue Date:
1995-11
Rights:
Copyright © International Foundation for Telemetering
Collection Information:
Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.
Publisher:
International Foundation for Telemetering
Journal:
International Telemetering Conference Proceedings
Abstract:
The Central Control Unit (CCU) for a decentralised on-board base-band telemetry system is designed for use in launch vehicle missions of the Indian Space Research Organisation (ISRO). This new design is a highly improved and miniaturised version of an earlier design. The major design highlights are as follows: usage of CMOS Field Programmable Gate Array (FPGA) devices in place of LS TTL devices, high level user programmability of TM format using EEPROMs, usage of high density memory for on-board data storage and delayed data transmission, HMC based pre-modulation filter and final output driver etc. The entire system is realised on a single 6 layer MLB and is packaged on a stackable modular frame. This design has resulted in a 1:4 reduction in weight, 1:4 reduction in volume, 1:5 reduction in power consumption and 1:3 reduction in height in addition to drastic reduction of part diversity and solder joints and thus greatly increased reliability. This paper discusses the design approach, implementation details, tools used, simulations carried out and the results of detailed qualification tests done on the realised qualification model.
Keywords:
Field Programmable Gate Array (FPGA); Telemetry (TM) Format; Hybrid Micro Circuit (HMC); Very Large Scale Integration (VLSI)
Sponsors:
International Foundation for Telemetering
ISSN:
0884-5123; 0074-9079
Additional Links:
http://www.telemetry.org/

Full metadata record

DC FieldValue Language
dc.language.isoen_USen
dc.titleField Programmable Gate Array Based Miniaturised Central Controller for a Decentralised Base-Band Telemetry System for Satellite Launch Vehiclesen_US
dc.contributor.authorKrishnakumar, M.en
dc.contributor.authorSreelal, S.en
dc.contributor.authorNarayana, T. V.en
dc.contributor.authorAnguswamy, P.en
dc.contributor.authorSingh, U. S.en
dc.contributor.departmentIndian Space Research Organisationen
dc.date.issued1995-11-
dc.rightsCopyright © International Foundation for Telemeteringen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
dc.publisherInternational Foundation for Telemeteringen
dc.description.abstractThe Central Control Unit (CCU) for a decentralised on-board base-band telemetry system is designed for use in launch vehicle missions of the Indian Space Research Organisation (ISRO). This new design is a highly improved and miniaturised version of an earlier design. The major design highlights are as follows: usage of CMOS Field Programmable Gate Array (FPGA) devices in place of LS TTL devices, high level user programmability of TM format using EEPROMs, usage of high density memory for on-board data storage and delayed data transmission, HMC based pre-modulation filter and final output driver etc. The entire system is realised on a single 6 layer MLB and is packaged on a stackable modular frame. This design has resulted in a 1:4 reduction in weight, 1:4 reduction in volume, 1:5 reduction in power consumption and 1:3 reduction in height in addition to drastic reduction of part diversity and solder joints and thus greatly increased reliability. This paper discusses the design approach, implementation details, tools used, simulations carried out and the results of detailed qualification tests done on the realised qualification model.en
dc.subjectField Programmable Gate Array (FPGA)en
dc.subjectTelemetry (TM) Formaten
dc.subjectHybrid Micro Circuit (HMC)en
dc.subjectVery Large Scale Integration (VLSI)en
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.identifier.issn0884-5123-
dc.identifier.issn0074-9079-
dc.identifier.urihttp://hdl.handle.net/10150/611604-
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.typetexten
dc.typeProceedingsen
dc.relation.urlhttp://www.telemetry.org/en
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