Persistent Link:
http://hdl.handle.net/10150/605595
Title:
A DIGITAL INTEGRATOR FOR AN S-BAND HIGH-SPEED FREQUENCY-HOPPING PHASE-LOCKED LOOP
Author:
Holtzman, Melinda; Johnson, Bruce; Lautzenhiser, Lloyd
Affiliation:
University of Nevada; Emhiser Research, Incorporated
Issue Date:
2003-10
Rights:
Copyright © International Foundation for Telemetering
Collection Information:
Proceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.
Publisher:
International Foundation for Telemetering
Journal:
International Telemetering Conference Proceedings
Abstract:
Phase-locked loop (PLL) frequency synthesizers used for high-speed data transmission must rapidly hop and lock to new frequencies. The fundamental problem is that the settling time depends inversely on the loop bandwidth, and increasing the bandwidth causes unwanted noise interference and stability problems for the circuit. We demonstrate the feasibility of replacing the analog integrator in the PLL with a digital integrator. This circuit has advantages of increased hopping speed, ability to compensate for temperature drift and system stability. PLL lock-in was demonstrated in a prototype circuit designed and built with both discrete components and with a programmable logic device.
Keywords:
Phase-locked loops; frequency synthesizers; fast frequency hopping
Sponsors:
International Foundation for Telemetering
ISSN:
0884-5123; 0074-9079
Additional Links:
http://www.telemetry.org/

Full metadata record

DC FieldValue Language
dc.language.isoen_USen
dc.titleA DIGITAL INTEGRATOR FOR AN S-BAND HIGH-SPEED FREQUENCY-HOPPING PHASE-LOCKED LOOPen_US
dc.contributor.authorHoltzman, Melindaen
dc.contributor.authorJohnson, Bruceen
dc.contributor.authorLautzenhiser, Lloyden
dc.contributor.departmentUniversity of Nevadaen
dc.contributor.departmentEmhiser Research, Incorporateden
dc.date.issued2003-10en
dc.rightsCopyright © International Foundation for Telemeteringen
dc.description.collectioninformationProceedings from the International Telemetering Conference are made available by the International Foundation for Telemetering and the University of Arizona Libraries. Visit http://www.telemetry.org/index.php/contact-us if you have questions about items in this collection.en
dc.publisherInternational Foundation for Telemeteringen
dc.description.abstractPhase-locked loop (PLL) frequency synthesizers used for high-speed data transmission must rapidly hop and lock to new frequencies. The fundamental problem is that the settling time depends inversely on the loop bandwidth, and increasing the bandwidth causes unwanted noise interference and stability problems for the circuit. We demonstrate the feasibility of replacing the analog integrator in the PLL with a digital integrator. This circuit has advantages of increased hopping speed, ability to compensate for temperature drift and system stability. PLL lock-in was demonstrated in a prototype circuit designed and built with both discrete components and with a programmable logic device.en
dc.subjectPhase-locked loopsen
dc.subjectfrequency synthesizersen
dc.subjectfast frequency hoppingen
dc.description.sponsorshipInternational Foundation for Telemeteringen
dc.identifier.issn0884-5123en
dc.identifier.issn0074-9079en
dc.identifier.urihttp://hdl.handle.net/10150/605595en
dc.identifier.journalInternational Telemetering Conference Proceedingsen
dc.typetexten
dc.typeProceedingsen
dc.relation.urlhttp://www.telemetry.org/en
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