Rinsing Of Wafers After Wet Processing: Simulation And Experiments

Persistent Link:
http://hdl.handle.net/10150/578724
Title:
Rinsing Of Wafers After Wet Processing: Simulation And Experiments
Author:
Chiang, Chieh-Chun
Issue Date:
2015
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
In semiconductor manufacturing, a large amount (50 billion gallons for US semiconductor fabrication plants in 2006) of ultrapure water (UPW) is used to rinse wafers after wet chemical processing to remove ionic contaminants on surfaces. Of great concern are the contaminants left in narrow (tens of nm), high-aspect-ratio (5:1 to 20:1) features (trenches, vias, and contact holes). The International Technology Roadmap for Semiconductors (ITRS) stipulates that ionic contaminant levels be reduced to below ~ 10¹⁰ atoms/cm². Understanding the bottlenecks in the rinsing process would enable conservation of rinse water usage. A comprehensive process model has been developed on the COMSOL platform to predict the dynamics of rinsing of narrow structures on patterned SiO₂ substrates initially cleaned with NH₄OH. The model considers the effect of various mass-transport mechanisms, including convection and diffusion/dispersion, which occur simultaneously with various surface phenomena, such as adsorption and desorption of impurities. The influences of charged species in the bulk and on the surface, and their induced electric field that affect both transport and surface interactions, have been addressed. Modeling results show that the efficacy of rinsing is strongly influenced by the rate of desorption of adsorbed contaminants, mass transfer of contaminants from the mouth of the feature to the bulk liquid, and the trench aspect ratio. Detection of the end point of rinsing is another way to conserve water used for rinsing after wet processing. The applicability of electrochemical impedance spectroscopy (EIS) to monitor rinsing of Si processed in HF with and without copper contaminant was explored. In the first study, the effect of the nature of surface state (flat band, depletion, or accumulation) of silicon on rinsing rate was investigated. The experimental results show that the state of silicon could affect rinsing kinetics through modulation of ion adsorption. In the second study, silicon was intentionally contaminated by spiking HF with copper ions, cleaned in dilute HCl and then rinsed, and the entire process was followed by continuous impedance measurements. The measured impedance values at different stages have been correlated to the nature of the silicon surface, as characterized by scanning electron microscope (SEM) and inductively coupled plasma mass spectrometry (ICP-MS) methods.
Type:
text; Electronic Dissertation
Keywords:
Materials Science & Engineering
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Graduate College; Materials Science & Engineering
Degree Grantor:
University of Arizona
Advisor:
Raghavan, Srini

Full metadata record

DC FieldValue Language
dc.language.isoen_USen
dc.titleRinsing Of Wafers After Wet Processing: Simulation And Experimentsen_US
dc.creatorChiang, Chieh-Chunen
dc.contributor.authorChiang, Chieh-Chunen
dc.date.issued2015en
dc.publisherThe University of Arizona.en
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en
dc.description.abstractIn semiconductor manufacturing, a large amount (50 billion gallons for US semiconductor fabrication plants in 2006) of ultrapure water (UPW) is used to rinse wafers after wet chemical processing to remove ionic contaminants on surfaces. Of great concern are the contaminants left in narrow (tens of nm), high-aspect-ratio (5:1 to 20:1) features (trenches, vias, and contact holes). The International Technology Roadmap for Semiconductors (ITRS) stipulates that ionic contaminant levels be reduced to below ~ 10¹⁰ atoms/cm². Understanding the bottlenecks in the rinsing process would enable conservation of rinse water usage. A comprehensive process model has been developed on the COMSOL platform to predict the dynamics of rinsing of narrow structures on patterned SiO₂ substrates initially cleaned with NH₄OH. The model considers the effect of various mass-transport mechanisms, including convection and diffusion/dispersion, which occur simultaneously with various surface phenomena, such as adsorption and desorption of impurities. The influences of charged species in the bulk and on the surface, and their induced electric field that affect both transport and surface interactions, have been addressed. Modeling results show that the efficacy of rinsing is strongly influenced by the rate of desorption of adsorbed contaminants, mass transfer of contaminants from the mouth of the feature to the bulk liquid, and the trench aspect ratio. Detection of the end point of rinsing is another way to conserve water used for rinsing after wet processing. The applicability of electrochemical impedance spectroscopy (EIS) to monitor rinsing of Si processed in HF with and without copper contaminant was explored. In the first study, the effect of the nature of surface state (flat band, depletion, or accumulation) of silicon on rinsing rate was investigated. The experimental results show that the state of silicon could affect rinsing kinetics through modulation of ion adsorption. In the second study, silicon was intentionally contaminated by spiking HF with copper ions, cleaned in dilute HCl and then rinsed, and the entire process was followed by continuous impedance measurements. The measured impedance values at different stages have been correlated to the nature of the silicon surface, as characterized by scanning electron microscope (SEM) and inductively coupled plasma mass spectrometry (ICP-MS) methods.en
dc.typetexten
dc.typeElectronic Dissertationen
dc.subjectMaterials Science & Engineeringen
thesis.degree.namePh.D.en
thesis.degree.leveldoctoralen
thesis.degree.disciplineGraduate Collegeen
thesis.degree.disciplineMaterials Science & Engineeringen
thesis.degree.grantorUniversity of Arizonaen
dc.contributor.advisorRaghavan, Srinien
dc.contributor.committeememberRaghavan, Srinien
dc.contributor.committeememberKeswani, Manishen
dc.contributor.committeememberShadman, Farhangen
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