Evaluation of SCIRTSS performance on sequential circuits biased against random sequences

Persistent Link:
http://hdl.handle.net/10150/554834
Title:
Evaluation of SCIRTSS performance on sequential circuits biased against random sequences
Author:
Van Helsland, Marshall Camiel, 1943-
Issue Date:
1974
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Type:
text; Thesis-Reproduction (electronic)
Keywords:
SCIRTSS (Computer program); Logic circuits -- Testing.; Electric fault location -- Data processing.; Digital integrated circuits -- Testing.
Degree Name:
M.S.
Degree Level:
masters
Degree Program:
Electrical Engineering; Graduate College
Degree Grantor:
University of Arizona

Full metadata record

DC FieldValue Language
dc.language.isoen_USen
dc.titleEvaluation of SCIRTSS performance on sequential circuits biased against random sequencesen
dc.creatorVan Helsland, Marshall Camiel, 1943-en
dc.contributor.authorVan Helsland, Marshall Camiel, 1943-en
dc.date.issued1974en
dc.publisherThe University of Arizona.en
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en
dc.description.noteThis item was digitized from a paper original and/or a microfilm copy. If you need higher-resolution images for any content in this item, please contact us at repository@u.library.arizona.edu.en
dc.typetexten
dc.typeThesis-Reproduction (electronic)en
dc.subjectSCIRTSS (Computer program)en
dc.subjectLogic circuits -- Testing.en
dc.subjectElectric fault location -- Data processing.en
dc.subjectDigital integrated circuits -- Testing.en
thesis.degree.nameM.S.en
thesis.degree.levelmastersen
thesis.degree.disciplineElectrical Engineeringen
thesis.degree.disciplineGraduate Collegeen
thesis.degree.grantorUniversity of Arizonaen
dc.identifier.oclc28371949en
dc.identifier.bibrecord.b28956060en
dc.identifier.callnumberE9791 1974 6en
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