Capacitance calculations for three-dimensional VLSI interconnection geometries

Persistent Link:
http://hdl.handle.net/10150/291396
Title:
Capacitance calculations for three-dimensional VLSI interconnection geometries
Author:
Omer, Ahmed Adan, 1964-
Issue Date:
1991
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
An integral equation formulation for the calculation of the capacitance of three-dimensional VLSI geometries is presented. A proper combination of 2D and 3D methods is used for efficient numerical computations. The method of moments is used for the solution of the integral equation. In addition, Green's functions that satisfy the boundary conditions at the dielectric interfaces are implemented in order to minimize the number of unknowns involved in the numerical solution. The mathematical formulation presented here and the associated computer program are appropriate for obtaining the capacitance matrix of complex three-dimensional multi-conductor configurations of the microstrip and the stripline type. Finally, numerical results for the per-unit-length capacitance and total capacitance of several interconnections are provided and compared with known results. Applications include the extraction of lumped capacitive elements used in the equivalent circuit representations of coupled conductor bends, vias and crossovers. In addition, calculations of per-unit-length capacitance of coupled flaring lines are performed.
Type:
text; Thesis-Reproduction (electronic)
Keywords:
Engineering, Electronics and Electrical.; Engineering, Packaging.
Degree Name:
M.S.
Degree Level:
masters
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Cangellaris, Andreas

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleCapacitance calculations for three-dimensional VLSI interconnection geometriesen_US
dc.creatorOmer, Ahmed Adan, 1964-en_US
dc.contributor.authorOmer, Ahmed Adan, 1964-en_US
dc.date.issued1991en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractAn integral equation formulation for the calculation of the capacitance of three-dimensional VLSI geometries is presented. A proper combination of 2D and 3D methods is used for efficient numerical computations. The method of moments is used for the solution of the integral equation. In addition, Green's functions that satisfy the boundary conditions at the dielectric interfaces are implemented in order to minimize the number of unknowns involved in the numerical solution. The mathematical formulation presented here and the associated computer program are appropriate for obtaining the capacitance matrix of complex three-dimensional multi-conductor configurations of the microstrip and the stripline type. Finally, numerical results for the per-unit-length capacitance and total capacitance of several interconnections are provided and compared with known results. Applications include the extraction of lumped capacitive elements used in the equivalent circuit representations of coupled conductor bends, vias and crossovers. In addition, calculations of per-unit-length capacitance of coupled flaring lines are performed.en_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.subjectEngineering, Electronics and Electrical.en_US
dc.subjectEngineering, Packaging.en_US
thesis.degree.nameM.S.en_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorCangellaris, Andreasen_US
dc.identifier.proquest1345437en_US
dc.identifier.bibrecord.b27031147en_US
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