Persistent Link:
http://hdl.handle.net/10150/291295
Title:
A TRANSLATER OF CLOCK MODE VHDL HARDWARE DESCRIPTION LANGUAGE
Author:
Wang, Xiao-Lin, 1955-
Issue Date:
1986
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Type:
text; Thesis-Reproduction (electronic)
Keywords:
Translators (Computer programs); Digital integrated circuits.; Very high speed integrated circuits.
Degree Name:
M.S.
Degree Level:
masters
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleA TRANSLATER OF CLOCK MODE VHDL HARDWARE DESCRIPTION LANGUAGEen_US
dc.creatorWang, Xiao-Lin, 1955-en_US
dc.contributor.authorWang, Xiao-Lin, 1955-en_US
dc.date.issued1986en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.subjectTranslators (Computer programs)en_US
dc.subjectDigital integrated circuits.en_US
dc.subjectVery high speed integrated circuits.en_US
thesis.degree.nameM.S.en_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.identifier.proquest1328517en_US
dc.identifier.oclc15042487en_US
dc.identifier.bibrecord.b15828360en_US
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