Characterization of high-speed electronic packages using reduced-order partial element equivalent circuit models

Persistent Link:
http://hdl.handle.net/10150/283989
Title:
Characterization of high-speed electronic packages using reduced-order partial element equivalent circuit models
Author:
Hasan, Samil Muklisin Yauma
Issue Date:
1999
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
Two circuit model extractors for complex multilayer microelectronic packages based on the Partial Element Equivalent Circuit (PEEC) technique, namely University of Arizona Effective Package Inductance Calculator (UAEPIC) and University of Arizona Effective Package Inductance and Capacitance Calculator (UAEPIC²), have been developed. The first one, UAEPIC, is based on the magneto-quasistatic assumption where the displacement current effect on the derivation of the electromagnetic field integral equation is neglected and thus the dominant inductive effects are modeled in order to extract the RL equivalent model. The second one, UAEPIC², uses a more rigorous electromagnetic model that accounts for displacement (yet nonretarded) electromagnetic effects to extract the RLC equivalent model of the given microelectronic package. The development of electrical models of packages of high complexity requires the numerical solution of linear systems of several thousands of equations. This makes the development of a broadband equivalent circuit to include skin effect computationally expensive. To circumvent this difficulty, two model order reduction techniques have been utilized. The method of Asymptotic Waveform Evaluation (AWE) has been incorporated in UAEPIC, and the Passive Reduced-order Interconnect Macromodeling Algorithm (PRIMA) has been applied to UAEPIC². Applications of AWE and PRIMA provide orders of magnitude reduction in computation labor and lead to a direct multiport Y-matrix representation in terms of the poles and residues. In this form, and using a special algorithm, the multiport, frequency-dependent equivalent circuit of the package can be incorporated efficiently in a SPICE-like circuit simulator. This simulation capability facilitates rapid and accurate simulations for the analysis of noise generation and signal degradation such as delay, cross-talk, power and ground bounces, and Simultaneous Switching Noise (SSN) in the package.
Type:
text; Dissertation-Reproduction (electronic)
Keywords:
Engineering, Electronics and Electrical.
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Cangellaris, Andreas C.; Prince, John L.

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleCharacterization of high-speed electronic packages using reduced-order partial element equivalent circuit modelsen_US
dc.creatorHasan, Samil Muklisin Yaumaen_US
dc.contributor.authorHasan, Samil Muklisin Yaumaen_US
dc.date.issued1999en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractTwo circuit model extractors for complex multilayer microelectronic packages based on the Partial Element Equivalent Circuit (PEEC) technique, namely University of Arizona Effective Package Inductance Calculator (UAEPIC) and University of Arizona Effective Package Inductance and Capacitance Calculator (UAEPIC²), have been developed. The first one, UAEPIC, is based on the magneto-quasistatic assumption where the displacement current effect on the derivation of the electromagnetic field integral equation is neglected and thus the dominant inductive effects are modeled in order to extract the RL equivalent model. The second one, UAEPIC², uses a more rigorous electromagnetic model that accounts for displacement (yet nonretarded) electromagnetic effects to extract the RLC equivalent model of the given microelectronic package. The development of electrical models of packages of high complexity requires the numerical solution of linear systems of several thousands of equations. This makes the development of a broadband equivalent circuit to include skin effect computationally expensive. To circumvent this difficulty, two model order reduction techniques have been utilized. The method of Asymptotic Waveform Evaluation (AWE) has been incorporated in UAEPIC, and the Passive Reduced-order Interconnect Macromodeling Algorithm (PRIMA) has been applied to UAEPIC². Applications of AWE and PRIMA provide orders of magnitude reduction in computation labor and lead to a direct multiport Y-matrix representation in terms of the poles and residues. In this form, and using a special algorithm, the multiport, frequency-dependent equivalent circuit of the package can be incorporated efficiently in a SPICE-like circuit simulator. This simulation capability facilitates rapid and accurate simulations for the analysis of noise generation and signal degradation such as delay, cross-talk, power and ground bounces, and Simultaneous Switching Noise (SSN) in the package.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.subjectEngineering, Electronics and Electrical.en_US
thesis.degree.namePh.D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorCangellaris, Andreas C.en_US
dc.contributor.advisorPrince, John L.en_US
dc.identifier.proquest9946873en_US
dc.identifier.bibrecord.b39928445en_US
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