Modeling the effect of copper contamination on junction diodes and MOS capacitors

Persistent Link:
http://hdl.handle.net/10150/282622
Title:
Modeling the effect of copper contamination on junction diodes and MOS capacitors
Author:
Lee, Li-Chyn, 1965-
Issue Date:
1998
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
Copper in silicon is known to have detrimental effects on silicon devices. Therefore, understanding how copper affects device performance and how copper is distributed in semiconductor device regions are essential pieces of information that are required in order to eliminate copper contamination. This dissertation is primarily devoted to the study of the effects of copper contamination on junction leakage current of diodes and C-t responses of MOS Capacitors. Copper distributions in junction diodes and MOS capacitors were investigated by SIMS and TEM images. An increase of leakage current was observed with increasing copper concentration in heavily doped diode regions. The increase can be modeled by assuming the capture cross section as a function of copper gettered in the n+ or p+ region. Three different shapes of C-t responses were obtained from pulsed MOS capacitors contaminated with copper. S-PISCES simulations, in conjunction with the Zerbst technique, were used to examine the shapes of C-t responses. The three shapes of the C-t curves can be explained by introducing regions with different lifetimes in the simulations. The low minority carrier lifetime region near the Si/SiO2 interface correlates with copper SIMS profiles. The copper diffusion mechanism in n+ or p+ regions was also investigated.
Type:
text; Dissertation-Reproduction (electronic)
Keywords:
Engineering, Electronics and Electrical.
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Parks, Harold G.

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleModeling the effect of copper contamination on junction diodes and MOS capacitorsen_US
dc.creatorLee, Li-Chyn, 1965-en_US
dc.contributor.authorLee, Li-Chyn, 1965-en_US
dc.date.issued1998en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractCopper in silicon is known to have detrimental effects on silicon devices. Therefore, understanding how copper affects device performance and how copper is distributed in semiconductor device regions are essential pieces of information that are required in order to eliminate copper contamination. This dissertation is primarily devoted to the study of the effects of copper contamination on junction leakage current of diodes and C-t responses of MOS Capacitors. Copper distributions in junction diodes and MOS capacitors were investigated by SIMS and TEM images. An increase of leakage current was observed with increasing copper concentration in heavily doped diode regions. The increase can be modeled by assuming the capture cross section as a function of copper gettered in the n+ or p+ region. Three different shapes of C-t responses were obtained from pulsed MOS capacitors contaminated with copper. S-PISCES simulations, in conjunction with the Zerbst technique, were used to examine the shapes of C-t responses. The three shapes of the C-t curves can be explained by introducing regions with different lifetimes in the simulations. The low minority carrier lifetime region near the Si/SiO2 interface correlates with copper SIMS profiles. The copper diffusion mechanism in n+ or p+ regions was also investigated.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.subjectEngineering, Electronics and Electrical.en_US
thesis.degree.namePh.D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorParks, Harold G.en_US
dc.identifier.proquest9829360en_US
dc.identifier.bibrecord.b38554057en_US
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