Design trade-off study for delta-doped Si/SiGe heterostructure MOSFET's: The potential nano-MOSFET's

Persistent Link:
http://hdl.handle.net/10150/282544
Title:
Design trade-off study for delta-doped Si/SiGe heterostructure MOSFET's: The potential nano-MOSFET's
Author:
Ip, Brian Kau, 1962-
Issue Date:
1997
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
A design trade-off study for n-channel δ-doped Si/SiGe heterojunction MOSFET's has been performed using a combination of numerical simulation and analysis. The design parameters unique to the δ-doped Si/SiGe heterostructure MOSFET's have been studied in terms of their effects on short-channel immunity, off-state leakage and on-state current. Our study shows that cap and channel layer must always be made as thin as possible to reduce the separation of the mobile charge centroid from the surface, in which case better short-channel immunity, better leakage and driving ability will result. On the other hand, the setback layer thickness, potential well depth and δ-doping dose are found to be trade-off parameters. Design windows that based on the trade-off parameters were constructed to obtained optimal designs for 0.2. μm channel length and 1.5 V supply voltage, and 0.1 μm channel length and 1 V supply voltage δ-doped Si/SiGe heterojunction MOSFET's. When compared to similarly configured conventional bulk MOSFET's, the 0.2 μm-1.5V design has approximately the same characteristics while the 0.1 μm-1V design has a 25% advantage in short-channel immunity. The δ-doped Si/SiGe heterojunction MOSFET is then redesigned by removing the cap layer, which results in a smaller effective oxide thickness but lower low-field mobility. The new structure is found to produce a 0.1μm-1V design that has improvement of 22% in on-state current, 54% in off-state leakage and 17% in short-channel immunity over the structure with the cap layer. We further are successful in producing a 70nm-1.2V design with excellent characteristics that cannot be reached by conventional MOSFET's. We conclude that the δ-doped Si/SiGe heterojunction MOSFET's without a cap layer have a high potential as the future high-performance transistors that can deliver high speed, high density and low power applications.
Type:
text; Dissertation-Reproduction (electronic)
Keywords:
Engineering, Electronics and Electrical.; Engineering, Materials Science.
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Brews, John R.

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleDesign trade-off study for delta-doped Si/SiGe heterostructure MOSFET's: The potential nano-MOSFET'sen_US
dc.creatorIp, Brian Kau, 1962-en_US
dc.contributor.authorIp, Brian Kau, 1962-en_US
dc.date.issued1997en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractA design trade-off study for n-channel δ-doped Si/SiGe heterojunction MOSFET's has been performed using a combination of numerical simulation and analysis. The design parameters unique to the δ-doped Si/SiGe heterostructure MOSFET's have been studied in terms of their effects on short-channel immunity, off-state leakage and on-state current. Our study shows that cap and channel layer must always be made as thin as possible to reduce the separation of the mobile charge centroid from the surface, in which case better short-channel immunity, better leakage and driving ability will result. On the other hand, the setback layer thickness, potential well depth and δ-doping dose are found to be trade-off parameters. Design windows that based on the trade-off parameters were constructed to obtained optimal designs for 0.2. μm channel length and 1.5 V supply voltage, and 0.1 μm channel length and 1 V supply voltage δ-doped Si/SiGe heterojunction MOSFET's. When compared to similarly configured conventional bulk MOSFET's, the 0.2 μm-1.5V design has approximately the same characteristics while the 0.1 μm-1V design has a 25% advantage in short-channel immunity. The δ-doped Si/SiGe heterojunction MOSFET is then redesigned by removing the cap layer, which results in a smaller effective oxide thickness but lower low-field mobility. The new structure is found to produce a 0.1μm-1V design that has improvement of 22% in on-state current, 54% in off-state leakage and 17% in short-channel immunity over the structure with the cap layer. We further are successful in producing a 70nm-1.2V design with excellent characteristics that cannot be reached by conventional MOSFET's. We conclude that the δ-doped Si/SiGe heterojunction MOSFET's without a cap layer have a high potential as the future high-performance transistors that can deliver high speed, high density and low power applications.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.subjectEngineering, Electronics and Electrical.en_US
dc.subjectEngineering, Materials Science.en_US
thesis.degree.namePh.D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorBrews, John R.en_US
dc.identifier.proquest9814445en_US
dc.identifier.bibrecord.b37744744en_US
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