Combinational Logic Unit implementation for the AHPL simulator HPSIM2

Persistent Link:
http://hdl.handle.net/10150/277094
Title:
Combinational Logic Unit implementation for the AHPL simulator HPSIM2
Author:
Salas, Jorge Martin, 1961-
Issue Date:
1989
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
The use of Computer Hardware Description Languages plays an important role in the design automation process of digital systems. These languages help hardware engineers to provide a precise description of the internal structure of a system, and one of the most significant uses of these languages is as a means of input to a system simulator. AHPL is a hardware description language that describes a digital system as a set of modules and units. This language is supported by a function-level simulator (HPSIM2), but the simulator only provides support to the module descriptions of a system. This paper presents an improved version of the simulator that supports the use of unit descriptions called Combinational Logic Units or CLUNITs. The syntax and structure of a CLUNIT is analyzed, the operation and data structure of the simulator is given; and several examples are given to support these discussions.
Type:
text; Thesis-Reproduction (electronic)
Keywords:
Computer engineering.; Computer hardware description languages.
Degree Name:
M.S.
Degree Level:
masters
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Hill, Fredrick J.

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleCombinational Logic Unit implementation for the AHPL simulator HPSIM2en_US
dc.creatorSalas, Jorge Martin, 1961-en_US
dc.contributor.authorSalas, Jorge Martin, 1961-en_US
dc.date.issued1989en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractThe use of Computer Hardware Description Languages plays an important role in the design automation process of digital systems. These languages help hardware engineers to provide a precise description of the internal structure of a system, and one of the most significant uses of these languages is as a means of input to a system simulator. AHPL is a hardware description language that describes a digital system as a set of modules and units. This language is supported by a function-level simulator (HPSIM2), but the simulator only provides support to the module descriptions of a system. This paper presents an improved version of the simulator that supports the use of unit descriptions called Combinational Logic Units or CLUNITs. The syntax and structure of a CLUNIT is analyzed, the operation and data structure of the simulator is given; and several examples are given to support these discussions.en_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.subjectComputer engineering.en_US
dc.subjectComputer hardware description languages.en_US
thesis.degree.nameM.S.en_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorHill, Fredrick J.en_US
dc.identifier.proquest1337980en_US
dc.identifier.oclc23185925en_US
dc.identifier.bibrecord.b17590371en_US
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