The implementation of the DEVS hierarchical abstract simulator using 286/10 single board computers

Persistent Link:
http://hdl.handle.net/10150/276592
Title:
The implementation of the DEVS hierarchical abstract simulator using 286/10 single board computers
Author:
Cheng, Tsaichin Daniel, 1959-
Issue Date:
1987
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
The purpose of this experiment was to implement an alternative mapping realization of the hierarchical abstract simulator on the Intel Multibus 1 microprocessor system. Utilizing three 286/10 single board computers, integration of the M286 monitor with the hierarchical abstract simulator algorithm and execution of the distributed simulator system (DSS) was studied. Seven experiments were done on the DSS showing that the DSS correctly executes the algorithm of the hierarchical abstract simulator. An additional benefit is that parallelism is achieved even without external input: one simulator executes the internal transition function, with other executing the external transition function. This system has demonstrated that the hierarchical abstract simulator concept can be implemented on present-day, available hardware.
Type:
text; Thesis-Reproduction (electronic)
Keywords:
Discrete-time systems.; Digital computer simulation.
Degree Name:
M.S.
Degree Level:
masters
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Zeigler, Bernard P.

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleThe implementation of the DEVS hierarchical abstract simulator using 286/10 single board computersen_US
dc.creatorCheng, Tsaichin Daniel, 1959-en_US
dc.contributor.authorCheng, Tsaichin Daniel, 1959-en_US
dc.date.issued1987en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractThe purpose of this experiment was to implement an alternative mapping realization of the hierarchical abstract simulator on the Intel Multibus 1 microprocessor system. Utilizing three 286/10 single board computers, integration of the M286 monitor with the hierarchical abstract simulator algorithm and execution of the distributed simulator system (DSS) was studied. Seven experiments were done on the DSS showing that the DSS correctly executes the algorithm of the hierarchical abstract simulator. An additional benefit is that parallelism is achieved even without external input: one simulator executes the internal transition function, with other executing the external transition function. This system has demonstrated that the hierarchical abstract simulator concept can be implemented on present-day, available hardware.en_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.subjectDiscrete-time systems.en_US
dc.subjectDigital computer simulation.en_US
thesis.degree.nameM.S.en_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorZeigler, Bernard P.en_US
dc.identifier.proquest1332457en_US
dc.identifier.oclc19868660en_US
dc.identifier.bibrecord.b16869965en_US
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