Persistent Link:
http://hdl.handle.net/10150/276463
Title:
ALTERNATE SCREENING PROCEDURES FOR SEMICONDUCTOR VISUAL INSPECTION
Author:
Guarin, Fernando, 1954-
Issue Date:
1987
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
A sequence of electrical tests was developed to provide a viable alternative to the performance of high magnification visual inspection for high reliability integrated circuits in a large volume production environment. The primary approach was based on: close monitoring of the Substrate-N epi I-V characteristics, voltage overstress exposure and subsequent verification of the devices' low level leakage and thermal response. This method was implemented and evaluated for the specific case of a 16K Bipolar Schottky PROM. Reliability tests indicated that devices processed using the proposed alternate screen sequence achieved failure rates as low as those obtained using high magnification visual inspection.
Type:
text; Thesis-Reproduction (electronic)
Keywords:
Integrated circuits -- Testing.; Semiconductors -- Testing.; Electric testing.
Degree Name:
M.S.
Degree Level:
masters
Degree Program:
Graduate College; Electrical and Computer Engineering
Degree Grantor:
University of Arizona

Full metadata record

DC FieldValue Language
dc.language.isoen_USen_US
dc.titleALTERNATE SCREENING PROCEDURES FOR SEMICONDUCTOR VISUAL INSPECTIONen_US
dc.creatorGuarin, Fernando, 1954-en_US
dc.contributor.authorGuarin, Fernando, 1954-en_US
dc.date.issued1987en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractA sequence of electrical tests was developed to provide a viable alternative to the performance of high magnification visual inspection for high reliability integrated circuits in a large volume production environment. The primary approach was based on: close monitoring of the Substrate-N epi I-V characteristics, voltage overstress exposure and subsequent verification of the devices' low level leakage and thermal response. This method was implemented and evaluated for the specific case of a 16K Bipolar Schottky PROM. Reliability tests indicated that devices processed using the proposed alternate screen sequence achieved failure rates as low as those obtained using high magnification visual inspection.en_US
dc.typetexten_US
dc.typeThesis-Reproduction (electronic)en_US
dc.subjectIntegrated circuits -- Testing.en_US
dc.subjectSemiconductors -- Testing.en_US
dc.subjectElectric testing.en_US
thesis.degree.nameM.S.en_US
thesis.degree.levelmastersen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.identifier.proquest1331404en_US
dc.identifier.oclc17576197en_US
dc.identifier.bibrecord.b16337268en_US
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