Development of Modeling, Simulation and Measurement Methodologies for Signal Integrity Analysis of High-Speed Packaging Interconnects

Persistent Link:
http://hdl.handle.net/10150/195316
Title:
Development of Modeling, Simulation and Measurement Methodologies for Signal Integrity Analysis of High-Speed Packaging Interconnects
Author:
Zhu, Lin
Issue Date:
2006
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
As chip complexity and speed continue to increase, the packaging interconnects increasingly affect the performance of the electrical systems. Signal integrity analysis becomes exceedingly complex and important. The primary goal of this research is in-depth understanding of the signal integrity issue in high-speed chips and electronic systems, and development of modeling, simulation, and measurement methodologies for accurate and efficient characterization or prediction of the electrical characteristics of these on-chip and on-substrate packaging interconnects. The research is focused on three parts. First, a new broadband measurement method is proposed to determine the complex material properties of the dielectric materials in "as-packaged" environments, and to extract the frequency dependant RLGC parameters of the packaging interconnects. Second, a broadband CPW to microstrip via-less transition is developed to facilitate on-wafer measurement of microstrip based packaging structures. Third, microstrip lines over gridded ground plane are studied. Methodologies are proposed to efficiently simulate these structures in the frequency domain and time domain. SPICE compatible lumped-element models are developed. The methodologies and the lumped element models are verified by frequency domain and time domain measurement.
Type:
text; Electronic Dissertation
Degree Name:
PhD
Degree Level:
doctoral
Degree Program:
Electrical & Computer Engineering; Graduate College
Degree Grantor:
University of Arizona
Advisor:
Melde, Kathleen L.
Committee Chair:
Melde, Kathleen L.

Full metadata record

DC FieldValue Language
dc.language.isoENen_US
dc.titleDevelopment of Modeling, Simulation and Measurement Methodologies for Signal Integrity Analysis of High-Speed Packaging Interconnectsen_US
dc.creatorZhu, Linen_US
dc.contributor.authorZhu, Linen_US
dc.date.issued2006en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractAs chip complexity and speed continue to increase, the packaging interconnects increasingly affect the performance of the electrical systems. Signal integrity analysis becomes exceedingly complex and important. The primary goal of this research is in-depth understanding of the signal integrity issue in high-speed chips and electronic systems, and development of modeling, simulation, and measurement methodologies for accurate and efficient characterization or prediction of the electrical characteristics of these on-chip and on-substrate packaging interconnects. The research is focused on three parts. First, a new broadband measurement method is proposed to determine the complex material properties of the dielectric materials in "as-packaged" environments, and to extract the frequency dependant RLGC parameters of the packaging interconnects. Second, a broadband CPW to microstrip via-less transition is developed to facilitate on-wafer measurement of microstrip based packaging structures. Third, microstrip lines over gridded ground plane are studied. Methodologies are proposed to efficiently simulate these structures in the frequency domain and time domain. SPICE compatible lumped-element models are developed. The methodologies and the lumped element models are verified by frequency domain and time domain measurement.en_US
dc.typetexten_US
dc.typeElectronic Dissertationen_US
thesis.degree.namePhDen_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineElectrical & Computer Engineeringen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorMelde, Kathleen L.en_US
dc.contributor.chairMelde, Kathleen L.en_US
dc.contributor.committeememberPalusinski, Olgierd A.en_US
dc.contributor.committeememberMa, Dongshengen_US
dc.identifier.proquest1440en_US
dc.identifier.oclc137355661en_US
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