THE QUALITY OF SYNTHESIZED SPEECH USING LINEAR PREDICTIVE CODING ON FINITE WORDLENGTH INTEGRATED CIRCUITS.

Persistent Link:
http://hdl.handle.net/10150/188024
Title:
THE QUALITY OF SYNTHESIZED SPEECH USING LINEAR PREDICTIVE CODING ON FINITE WORDLENGTH INTEGRATED CIRCUITS.
Author:
CARLSON, GERRARD MERRILL.
Issue Date:
1985
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
This paper studies the quality of synthetic speech produced by integrated circuit (IC) hardware using fixed-point arithmetic and Linear Predictive Coding (LPC). A theoretical model explaining the combined effects of finite wordlength and parametric model order is developed. This model is used to predict the results obtained in the experimental phase of this study. In the experimental phase, selected model utterances are synthesized under finite wordlength constraints using LPC parameters. The synthetic speech is evaluated in terms of the log area ratios which define objective speech quality as a parametric distance. A theoretical model is developed to predict the experimental results. Simulations of this model produce data that predict the experimental results. The same information is extracted from the model as that obtained from actually running the fixed-point synthesizer simulator. Since the predictions of the theoretical model agree quite well with the experimental measurements, it is concluded that fixed-point synthesizer performance can be predicted without actually running a complicated and expensive fixed-point synthesizer. Secondly, results obtained from either method clearly indicate that for 15 or 16 bits, ten is the best number of poles to use. Eight useable poles are indicated for 14 bits, while seven are indicated for 13 bits. Based on the results of this study, the use of less than 13 bits for fixed-point calculations is not recommended.
Type:
text; Dissertation-Reproduction (electronic)
Keywords:
Speech synthesis -- Evaluation.; Speech processing systems -- Evaluation.
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Electrical and Computer Engineering; Graduate College
Degree Grantor:
University of Arizona
Advisor:
Strickland, Robin N.

Full metadata record

DC FieldValue Language
dc.language.isoenen_US
dc.titleTHE QUALITY OF SYNTHESIZED SPEECH USING LINEAR PREDICTIVE CODING ON FINITE WORDLENGTH INTEGRATED CIRCUITS.en_US
dc.creatorCARLSON, GERRARD MERRILL.en_US
dc.contributor.authorCARLSON, GERRARD MERRILL.en_US
dc.date.issued1985en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractThis paper studies the quality of synthetic speech produced by integrated circuit (IC) hardware using fixed-point arithmetic and Linear Predictive Coding (LPC). A theoretical model explaining the combined effects of finite wordlength and parametric model order is developed. This model is used to predict the results obtained in the experimental phase of this study. In the experimental phase, selected model utterances are synthesized under finite wordlength constraints using LPC parameters. The synthetic speech is evaluated in terms of the log area ratios which define objective speech quality as a parametric distance. A theoretical model is developed to predict the experimental results. Simulations of this model produce data that predict the experimental results. The same information is extracted from the model as that obtained from actually running the fixed-point synthesizer simulator. Since the predictions of the theoretical model agree quite well with the experimental measurements, it is concluded that fixed-point synthesizer performance can be predicted without actually running a complicated and expensive fixed-point synthesizer. Secondly, results obtained from either method clearly indicate that for 15 or 16 bits, ten is the best number of poles to use. Eight useable poles are indicated for 14 bits, while seven are indicated for 13 bits. Based on the results of this study, the use of less than 13 bits for fixed-point calculations is not recommended.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.subjectSpeech synthesis -- Evaluation.en_US
dc.subjectSpeech processing systems -- Evaluation.en_US
thesis.degree.namePh.D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorStrickland, Robin N.en_US
dc.contributor.committeememberSchooley, Larry C.en_US
dc.contributor.committeememberMylrea, Kenneth C.en_US
dc.identifier.proquest8525589en_US
dc.identifier.oclc696627906en_US
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