Persistent Link:
http://hdl.handle.net/10150/185913
Title:
Discrete event simulation on a massively parallel computer.
Author:
Wang, Yung-Hsin.
Issue Date:
1992
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Abstract:
Discrete-event simulation appears to be an ideal candidate for parallel processing not only because many large-scale simulations take extremely long execution times on conventional computers but also because the systems being modelled often contain considerable amounts of intrinsic parallelism. Ability to simulate large models in a reasonable time is the motivation for seeking speed advantages offered by parallel computer systems. The Connection Machine is an example of a massively parallel computer with a general communications network in which any processor can communicate with any other that is well suited for the DEVS (Discrete Event System Specification) broadcast models simulation. However, a new approach is required to mapping the DEVS abstract simulator onto a SIMD architecture such as that of the Connection Machine CM-2. This dissertation extends the DEVS formalism to allow the exploitation of data parallelism afforded by a massively parallel SIMD architecture. A broadcast model simulation environment is implemented in *Lisp on the Connection Machine CM-2. Two examples of parallel processor models are presented for demonstration. Several runs are made on the implementation using the Parallel Processor Broadcast Architecture model. The experimental results are compared to those from DEVS-Scheme running on sequential machines such as the Sun-4 workstation and the Motorola Delta 88K MultiPersonal Computer using the same model. The results show that simulations on the CM-2 are approximately 150 times faster. In addition, to get some insight on the effect of increasing the number of processors of a SIMD architecture (i.e., the size of the broadcast model simulated), runs were made to measure the execution times. The execution results confirm our analysis pointing to imitations in the SIMD architecture for exploiting DEVS internal event parallelism.
Type:
text; Dissertation-Reproduction (electronic)
Keywords:
Dissertations, Academic.; Computer science.; Discrete-time systems.
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Electrical and Computer Engineering; Graduate College
Degree Grantor:
University of Arizona
Advisor:
Zeigler, Bernard P.

Full metadata record

DC FieldValue Language
dc.language.isoenen_US
dc.titleDiscrete event simulation on a massively parallel computer.en_US
dc.creatorWang, Yung-Hsin.en_US
dc.contributor.authorWang, Yung-Hsin.en_US
dc.date.issued1992en_US
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.abstractDiscrete-event simulation appears to be an ideal candidate for parallel processing not only because many large-scale simulations take extremely long execution times on conventional computers but also because the systems being modelled often contain considerable amounts of intrinsic parallelism. Ability to simulate large models in a reasonable time is the motivation for seeking speed advantages offered by parallel computer systems. The Connection Machine is an example of a massively parallel computer with a general communications network in which any processor can communicate with any other that is well suited for the DEVS (Discrete Event System Specification) broadcast models simulation. However, a new approach is required to mapping the DEVS abstract simulator onto a SIMD architecture such as that of the Connection Machine CM-2. This dissertation extends the DEVS formalism to allow the exploitation of data parallelism afforded by a massively parallel SIMD architecture. A broadcast model simulation environment is implemented in *Lisp on the Connection Machine CM-2. Two examples of parallel processor models are presented for demonstration. Several runs are made on the implementation using the Parallel Processor Broadcast Architecture model. The experimental results are compared to those from DEVS-Scheme running on sequential machines such as the Sun-4 workstation and the Motorola Delta 88K MultiPersonal Computer using the same model. The results show that simulations on the CM-2 are approximately 150 times faster. In addition, to get some insight on the effect of increasing the number of processors of a SIMD architecture (i.e., the size of the broadcast model simulated), runs were made to measure the execution times. The execution results confirm our analysis pointing to imitations in the SIMD architecture for exploiting DEVS internal event parallelism.en_US
dc.typetexten_US
dc.typeDissertation-Reproduction (electronic)en_US
dc.subjectDissertations, Academic.en_US
dc.subjectComputer science.en_US
dc.subjectDiscrete-time systems.en_US
thesis.degree.namePh.D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorZeigler, Bernard P.en_US
dc.contributor.committeememberRozenblit, Jerzy W.en_US
dc.contributor.committeememberMarefat, Michael M.en_US
dc.identifier.proquest9234908en_US
dc.identifier.oclc713038973en_US
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