A SOFT-COMPUTING BASED SYSTEM LEVEL DESIGN SPACE EXPLORATION METHODOLOGY FOR SYSTEM-ON-CHIP DESIGNS

Persistent Link:
http://hdl.handle.net/10150/146065
Title:
A SOFT-COMPUTING BASED SYSTEM LEVEL DESIGN SPACE EXPLORATION METHODOLOGY FOR SYSTEM-ON-CHIP DESIGNS
Author:
Wu, Qinglong
Issue Date:
2009
Publisher:
The University of Arizona.
Rights:
Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.
Embargo:
Embargo: Release after 12/2/2011
Abstract:
This dissertation presents a novel intelligent embedded multi-objective multiple design space exploration methodology (IMODE) to support fast early system level System-on-Chip (SoC) design space exploration in order to improve design productivity and quality. The IMODE methodology uses two soft-computing technologies - a Pareto multi-objective genetic algorithm and a fuzzy logic system at their respective advantages to effectively and efficiently explore multiple large design spaces and make intelligent design decisions. The design space search process is guided by the Pareto multi-objective genetic algorithm to heuristically cover large design spaces and the design decision is performed by the fuzzy logic system based decision making engine which introduces another layer of computation intelligence on top of the intelligent design space search process. The IMODE methodology is unique and more comprehensive than many other existing SoC design space exploration methodologies in that design space exploration and decision making are two separated but still interdependent processes, and all heterogeneous design space explorations - computation/core exploration, communication architecture exploration, and physical design exploration, are integrated into a single SoC exploration flow and covered with a unified methodology which can significantly improve methodology continuity.
Type:
text; Electronic Dissertation
Degree Name:
Ph.D.
Degree Level:
doctoral
Degree Program:
Graduate College; Electrical & Computer Engineering
Degree Grantor:
University of Arizona
Advisor:
Rozenblit, Jerzy W.

Full metadata record

DC FieldValue Language
dc.language.isoenen_US
dc.titleA SOFT-COMPUTING BASED SYSTEM LEVEL DESIGN SPACE EXPLORATION METHODOLOGY FOR SYSTEM-ON-CHIP DESIGNSen_US
dc.creatorWu, Qinglongen_US
dc.contributor.authorWu, Qinglongen_US
dc.date.issued2009-
dc.publisherThe University of Arizona.en_US
dc.rightsCopyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction or presentation (such as public display or performance) of protected items is prohibited except with permission of the author.en_US
dc.description.releaseEmbargo: Release after 12/2/2011en_US
dc.description.abstractThis dissertation presents a novel intelligent embedded multi-objective multiple design space exploration methodology (IMODE) to support fast early system level System-on-Chip (SoC) design space exploration in order to improve design productivity and quality. The IMODE methodology uses two soft-computing technologies - a Pareto multi-objective genetic algorithm and a fuzzy logic system at their respective advantages to effectively and efficiently explore multiple large design spaces and make intelligent design decisions. The design space search process is guided by the Pareto multi-objective genetic algorithm to heuristically cover large design spaces and the design decision is performed by the fuzzy logic system based decision making engine which introduces another layer of computation intelligence on top of the intelligent design space search process. The IMODE methodology is unique and more comprehensive than many other existing SoC design space exploration methodologies in that design space exploration and decision making are two separated but still interdependent processes, and all heterogeneous design space explorations - computation/core exploration, communication architecture exploration, and physical design exploration, are integrated into a single SoC exploration flow and covered with a unified methodology which can significantly improve methodology continuity.en_US
dc.typetexten_US
dc.typeElectronic Dissertationen_US
thesis.degree.namePh.D.en_US
thesis.degree.leveldoctoralen_US
thesis.degree.disciplineGraduate Collegeen_US
thesis.degree.disciplineElectrical & Computer Engineeringen_US
thesis.degree.grantorUniversity of Arizonaen_US
dc.contributor.advisorRozenblit, Jerzy W.en_US
dc.contributor.committeememberAkoglu, Alien_US
dc.contributor.committeememberLysecky, Romanen_US
dc.identifier.proquest10767-
dc.identifier.oclc659753607-
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